* Qualcomm Technologies, Inc. MSM Camera CSID PPI

Camera CSID PPI device provides the definitions for enabling
the CSID PPI hardware. It also provides the functions for the client
to control the CSID PPI hardware.

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Required Node Structure
=======================
The CSID PPI device is described in one level of the device node.

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First Level Node - CAM CSID PPI device
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- compatible
  Usage: required
  Value type: <string>
  Definition: Should be "qcom,ppi100"

- cell-index
  Usage: required
  Value type: <u32>
  Definition: Should specify the hardware index id.

- reg-names
  Usage: required
  Value type: <string>
  Definition: Should specify the name of the register block.

- reg
  Usage: required
  Value type: <u32>
  Definition: Register values.

- interrupt-names
  Usage: Required
  Value type: <string>
  Definition: Name of the interrupt.

- interrupts
  Usage: Required
  Value type: <u32>
  Definition: Interrupt associated with CSID PPI HW.

- regulator-names
  Usage: required
  Value type: <string>
  Definition: Name of the regulator resources for CSID PPI HW.

- clock-names
  Usage: required
  Value type: <string>
  Definition: List of clock names required for CSID PPI HW.

- clocks
  Usage: required
  Value type: <phandle>
  Definition: List of clocks used for CSID PPI HW.

- clock-rates
  Usage: required
  Value type: <u32>
  Definition: List of clocks rates.

- clock-cntl-level
  Usage: required
  Value type: <string>
  Definition: All different clock level node can support.

Example:

	cam_ppi0: qcom,ppi0@5cb3000 {
		cell-index = <0>;
		compatible = "qcom,ppi100";
		reg-names = "ppi0";
		reg = <0x5cb3000 0x200>;
		interrupt-names = "ppi0";
		interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
		clocks = <&gcc GCC_CAMSS_CPHY_0_CLK>;
		clock-names = "gcc_camss_cphy_0_clk";
		clock-cntl-level = "svs";
		clock-rates = <0>;
		status = "ok";
	};

